Presently, pin grid array (PGA) packages are utilized for providing high pin count devices with electrical inputs/outputs. Multilayer ceramic or plastic PGA packages are expensive and at the present time cost approximately 10-12 cents per pin or 5-6 cents per pin, respectively. Each pin requires an individual brazing point for external pins on the package body. Plastic PGA's are significantly limited by thermal issues.
The present invention is directed to a low cost pin grid array carrier that is similar to a PGA package, but with cost improvements of five to ten times over present packages and with at least similar or better performance. The present invention utilizes standard leadframes which are preformed, stacked and partly recessed. Bonded insulating adhesive layers applied between each of the leadframes supply support. The preformed leadframes are positioned such that the leads from each leadframe are 50 or 100 mils apart, similar to a standard PGA footprint. Variation of the standard package can be provided with a cavity-down or a cavity-up package by maintaining the die paddle only on the top or bottom leadframe, respectively. The die paddles from other leadframes used in the stacks are punched out. A single chip, or a multichip module can be packaged. The package is not restricted to a single chip since an interconnect substrate with a plurality of chips can be placed in the package cavity. If desired, the package can be connected to a heat sink and the package may be designed to be hermetically sealed, or simply environmentally protected.